SK Hynix Sees AI Infrastructure Performance Growing Twentyfold by 2030
SK Hynix says the rapid expansion of AI inference will require a broad redesign of memory systems, including advanced HBM, stacked DRAM and high-bandwidth flash.
SEOUL — The performance scale of artificial intelligence infrastructure could expand to about 20 times its current level by 2030, an SK Hynix executive said Wednesday, highlighting the growing pressure on memory technology as AI inference workloads become larger and more complex.
Ahn Hyun, the chipmaker’s president and chief development officer, presented the projection during a keynote address at SEDEX 2026, South Korea’s annual semiconductor exhibition at Coex in southern Seoul. Speaking on the evolution of memory technology in the AI era, Ahn said infrastructure demand is being driven simultaneously by more complex tasks, longer context lengths and a rising volume of inference requests.
The shift from training AI models to running them at scale is placing new demands on systems that must store and move large amounts of data quickly. One growing challenge is the expansion of key-value caches, which retain information already processed by an AI model so it can be reused during inference. Those caches increasingly require data to be distributed across high-bandwidth memory, conventional DRAM and solid-state drives.
Moving data among those layers can itself become a bottleneck, limiting performance while increasing power consumption. Ahn said the industry therefore needs to optimize the entire memory hierarchy rather than focusing only on improving the speed of individual products.
SK Hynix is pursuing several technologies as part of that strategy. Alongside continued improvements to high-bandwidth memory, the company is developing three-dimensional stacked DRAM and high-bandwidth flash. Stacked DRAM places memory above logic chips such as graphics processing units and neural processing units, an architecture intended to raise performance while reducing energy use.
High-bandwidth flash applies the through-silicon-via stacking and high-speed input-output techniques used in HBM to NAND flash. SK Hynix aims for the technology to provide roughly half the bandwidth of a comparable generation of HBM while offering about 10 times the capacity. The company plans to work with global partners on standardization and continue developing other next-generation memory technologies, including Compute Express Link.
At the exhibition, SK Hynix displayed products and concepts including seventh-generation HBM4E, high-bandwidth flash, DRAM for servers, personal computers and mobile devices, NAND products and solid-state drives. The Korea Semiconductor Industry Association said this year’s event drew 300 companies across 888 booths, an increase of about 70 companies and more than 230 booths from last year, making it the largest edition to date.
The presentation underscored how the AI boom is reshaping competition among memory suppliers. As inference spreads across data centers and devices, capacity, bandwidth and power efficiency are becoming increasingly interconnected business priorities rather than separate engineering targets.
